Vertical System
|
| Bandwidth |
300 MHz |
| Rise time |
1.2 ns |
| Input Channels |
4 |
| Bandwidth Limiters |
20 MHz |
| Input Impedance |
1 MΩ ± 2% || 18 pF ± 3 pF, 50 Ω ± 2% |
| Input Coupling |
AC, DC, GND |
| Maximum Input Voltage |
1 MΩ: ± 400 Vpk, 50 Ω: 5 VRMS |
| Channel-Channel Isolation |
≥ 100:1 at 100 MHz
≥ 50:1 at 150 MHz
|
| Vertical Resolution |
8 bits |
| Sensitivity |
2 mV/div - 5 V/div |
| DC Gain Accuracy |
±3%: 5 mV/div - 5 V/div (fixed gain ranges)
±4%: 2mV/div and variable gain ranges
|
| Offset Range |
±800mV: 2mV/div - 200 mV/div
±40V: 206 mV/div - 5 V/div
|
| |
Horizontal System
|
| Time/Division Range |
1 ns/div - 50 s/div |
| Clock Accuracy |
100 ppm |
| Trigger and Interpolator Jitter |
.4 ns (pk-pk) |
| |
Acquisition System
|
| Single-Shot Sample Rate/Ch |
2 GS/s on 1 Ch
1 GS/s on 2 Ch
|
| Equivalent Sample Rate |
50 GS/s |
| Memory |
24 kpts/Ch on 2 Ch
12 kpts/ch on 4 Ch
|
| |
Acquisition Modes
|
| Averaging |
Selectable Number of Sweeps:
4, 16, 32, 64, 128, 256
|
| Peak Detect |
2.5 ns |
| Interpolation |
Linear, Sin x/x |
| Enhanced Resolution |
na |
| Sequence Mode |
na |
| |
Triggering System
|
| Modes |
Normal, Auto, Single, Stop |
| Sources |
Ch 1 - Ch 4, EXT, EXT/5, AC Line |
| Coupling Mode |
AC, DC, LF Rej, HF Rej, |
| Pre-trigger Delay |
memory/(2 * sample rate) |
| Post-trigger Delay |
260 Divisions |
| Hold-off by Time or Events |
100 ns - 1.5 s |
| Internal Trigger Range |
±6 divisions from center |
| Trigger Sensitivity |
1 division: DC - 10 MHz
1.5 divisions: 10 MHz - 300 MHz
|
| External Trigger Sensitivity |
Ext: 200 mVpp from DC to 10 MHz
300 mVpp from 10 MHz to 300 MHz
Ext/5: 1Vpp from DC to 10 MHz
1.5 mVpp from 10 MHz to 300 MHz
|
| External Trigger Input Range |
Ext: ±1.2 V, EXT/5: ±6 V |